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CORE module


#define CORE_Init()   CORE_PORT_Init()
#define CORE_Deinit()   CORE_PORT_Deinit()
#define CORE_EnterCritical()   CORE_PORT_EnterCritical()
#define CORE_ExitCritical()   CORE_PORT_ExitCritical()
#define CORE_EnableInterrupts()   CORE_PORT_EnableInterrupts()
#define CORE_DisableInterrupts()   CORE_PORT_DisableInterrupts()
#define CORE_GetSystemTime()   OS_GetSystemTime()
#define CORE_Reset()   CORE_PORT_Reset()


size_t CORE_GetUIDSize (void)

Detailed Description


This module implements the basic functionality of a processor core. It provides the main initialization and deinitialization functions, that can be used to implement startup/system setup and safe shutdown. It also provides necessary abstraction functions to implement atomic code blocks (critical sections).

Initialization and deinitialization.

The CORE initialization is used to initialize the port of HAL. The exact functionality behind this may vary with processor architecture. Some examples include configuring power management, clocks, internal PLLs etc. Note, that CORE_Init invokes port's CORE_PORT_Init.

The deinitialization of CORE module also strongly depends on the system architecture. Typical examples of CORE_Deinit usage would be: shutting down voltage regulators, external reset, dumping volatile memories etc.


The CORE module handles global interrupt state through CORE_EnableInterrupts and CORE_DisableInterrupts.

Critical sections.

Very often it is necessary to make a block of code indivisible. Such blocks are called critical sections. The implementation of critical section is processor and system dependent, however the most common way of achieving such behavior is to block (disable) all interrupts at the beginning of the atomic code block and re-enable them at it's end. In such implementation the CORE_EnterCritical would disable interrupts and CORE_ExitCritical would re-enable them. Some care must be taken in order to implement nestable critical section, however the HAL interface does not specify whether they should or shouldn't be nestable. It's up to the user, or more precisely: HAL port developer.

Macro Definition Documentation

#define CORE_Deinit ( )    CORE_PORT_Deinit()

Deinitializes HAL and all the underlying hardware

#define CORE_DisableInterrupts ( )    CORE_PORT_DisableInterrupts()

Disables interrupts globally

#define CORE_EnableInterrupts ( )    CORE_PORT_EnableInterrupts()

Enables interrupts globally

#define CORE_EnterCritical ( )    CORE_PORT_EnterCritical()

Starts a critical section

#define CORE_ExitCritical ( )    CORE_PORT_ExitCritical()

Ends a critical section

#define CORE_Init ( )    CORE_PORT_Init()

Initializes HAL and all the underlying hardware

#define CORE_Reset ( )    CORE_PORT_Reset()

Reset application processor.

Function Documentation

HALRESULT CORE_GetUID ( void *  uid)

Gets the unique identifier (UID)

uidplace to store the UID
HALRESULT_OK if the operation succeeded and the uid was populated with data, other values indicate error
size_t CORE_GetUIDSize ( void  )

Gets the size of a unique identifier, that identifies the device.

size (in bytes) of an available unique identifier, value of 0 means that the device has no UID available
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